33 #ifndef NCAR_A2D_PRIV_H
34 #define NCAR_A2D_PRIV_H
39 #include <linux/wait.h>
40 #include <linux/device.h>
42 #define A2D_MAX_RATE 5000
45 #define A2DINSTBSY 0x8000 //Instruction being performed
46 #define A2DDATARDY 0x4000 //Data ready to be read (Read cycle)
47 #define A2DDATAREQ 0x2000 //New data required (Write cycle)
48 #define A2DIDERR 0x1000 //ID error
49 #define A2DCRCERR 0x0800 //Data corrupted--CRC error
50 #define A2DDATAERR 0x0400 //Conversion data invalid
51 #define A2DINSTREG15 0x0200 //Instr reg bit 15
52 #define A2DINSTREG13 0x0100 // 13
53 #define A2DINSTREG12 0x0080 // 12
54 #define A2DINSTREG11 0x0040 // 11
55 #define A2DINSTREG06 0x0020 // 06
56 #define A2DINSTREG05 0x0010 // 05
57 #define A2DINSTREG04 0x0008 // 04
58 #define A2DINSTREG01 0x0004 // 01
59 #define A2DINSTREG00 0x0002 // 00
60 #define A2DCONFIGEND 0x0001 //Configuration End Flag.
62 #define A2DSTAT_INSTR_MASK 0x3fe // mask of instruction bits in status
86 #define MAX_A2D_BOARDS 4 // maximum number of A2D boards
88 #define HWFIFODEPTH 1024 // # of words in card's hardware FIFO
109 #define POLL_WHEN_QUARTER_FULL
111 #define A2DMASTER 0 // A/D chip designated to produce interrupts
112 #define A2DIOWIDTH 0x10 // Width of I/O space
117 # define A2DCMDADDR 0xF
121 #define A2DIO_FIFO 0x0 // Next IO instr a FIFO data inw or FIFO control outb
122 #define A2DIO_CS_CMD 0x1 // command read/write of A2D chip
123 #define A2DIO_I2C 0x2 // i2c read/write
124 #define A2DIO_DATA 0x3 // data write, gain codes to base+0, fcoeffs to base+chan*2
125 #define A2DIO_D2A1 0x4 // sent after gains codes have been sent (needed?)
126 #define A2DIO_CALV 0x5 // cal voltage write
127 #define A2DIO_SYSCTL 0x6 // read A/D INT lines, write cal/offset bits for 8 channels
128 #define A2DIO_FIFOSTAT 0x7 // read board status, set master A/D
131 #define A2DIO_CS_WR 0x0 // write, default for CS_CMD
132 #define A2DIO_CS_RD 0x8 // read, next IO an inw from base+chan*2
134 #define A2DIO_CS_CMD_RD (A2DIO_CS_CMD + A2DIO_CS_RD) // chan select, next an inw from base+chan*2
135 #define A2DIO_CS_CMD_WR (A2DIO_CS_CMD + A2DIO_CS_WR) // chan select, next an outw to base+chan*2
138 #define AD7725_READID 0x8802 // Read device ID (NOT USED)
139 #define AD7725_READDATA 0x8d21 // Read converted data
140 #define AD7725_WRCONFIG 0x1800 // Write configuration data
141 #define AD7725_WRCONFEM 0x1A00 // Write configuration, mask data (NOT USED)
142 #define AD7725_ABORT 0x0000 // Soft reset; still configured
143 #define AD7725_BFIR 0x2000 // Boot from internal ROM (NOT USED)
146 #define FIFOCLR 0x01 // [FIFOCTL(0)> Cycle this bit 0-1-0 to clear FIFO
147 #define A2DAUTO 0x02 // [FIFOCTL(1)> Set = allow A/D's to run automatically
148 #define A2DSYNC 0x04 // [FIFOCTL(2)> Set then cycle A2DSYNCCK to stop A/D's
149 #define A2DSYNCCK 0x08 // [FIFOCTL(3)> Cycle to latch A2DSYNC bit value
150 #define A2D1PPSEBL 0x10 // [FIFOCTL(4)> Set to allow GPS 1PPS to clear SYNC
151 #define FIFODAFAE 0x20 // [FIFOCTL(5)> Set to clamp value of AFAE in FIFO // NOT USED
152 #define A2DSTATEBL 0x40 // [FIFOCTL(6)> Enable A2D status
153 #define FIFOWREBL 0x80 // [FIFOCTL(7)> Enable writing to FIFO. (not used) // NOT USED
156 #define FIFOHF 0x01 // FIFO half full
157 #define FIFOAFAE 0x02 // FIFO almost full/almost empty
158 #define FIFONOTEMPTY 0x04 // FIFO not empty
159 #define FIFONOTFULL 0x08 // FIFO not full
160 #define INV1PPS 0x10 // Inverted 1 PPS pulse
161 #define PRESYNC 0x20 // Presync bit // NOT USED
163 #define USE_RESET_WORKER
239 #ifdef USE_RESET_WORKER
260 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
263 struct semaphore
mutex;
struct irig_callback * tempCallback
Definition: ncar_a2d_priv.h:230
int scanDeltatMsec
Definition: ncar_a2d_priv.h:194
Definition: ncar_a2d_priv.h:173
long latencyMsecs
Definition: ncar_a2d_priv.h:252
unsigned short ocfilter[CONFBLOCKS *CONFBLLEN+1]
Definition: ncar_a2d_priv.h:191
struct sample_read_state a2d_read_state
Definition: ncar_a2d_priv.h:219
long latencyJiffies
Definition: ncar_a2d_priv.h:253
Definition: ncar_a2d.h:112
unsigned int skippedSamples
Definition: ncar_a2d_priv.h:237
unsigned char i2c
Definition: ncar_a2d_priv.h:248
struct irig_callback * a2dCallback
Definition: ncar_a2d_priv.h:228
char deviceName[32]
Definition: ncar_a2d_priv.h:183
int resets
Definition: ncar_a2d_priv.h:244
int skipFactor
Definition: ncar_a2d_priv.h:199
dsm_sample_length_t length
Definition: ncar_a2d_priv.h:168
#define CONFBLOCKS
Definition: ncar_a2d.h:60
struct work_struct resetWorker
Definition: ncar_a2d_priv.h:240
int pollRate
Definition: ncar_a2d_priv.h:196
struct ncar_a2d_status cur_status
Definition: ncar_a2d_priv.h:257
short currentTemp
Definition: ncar_a2d_priv.h:233
struct work_struct sampleWorker
Definition: ncar_a2d_priv.h:250
int dsm_sample_time_t
Depending on the module, either tenths of milliseconds, or milliseconds since 00:00 UTC today...
Definition: types.h:48
unsigned short id
Definition: ncar_a2d_priv.h:169
int discardNextScan
Definition: ncar_a2d_priv.h:204
struct ncar_a2d_cal_config cal
Definition: ncar_a2d_priv.h:256
unsigned char FIFOCtl
Definition: ncar_a2d_priv.h:247
unsigned long lastWakeup
Definition: ncar_a2d_priv.h:254
Definition: ncar_a2d.h:72
struct device * device
Definition: ncar_a2d_priv.h:185
struct irig_callback * ppsCallback
Definition: ncar_a2d_priv.h:221
struct ncar_a2d_status prev_status
Definition: ncar_a2d_priv.h:258
int numPollDelaysLeft
Definition: ncar_a2d_priv.h:212
int totalOutputRate
Definition: ncar_a2d_priv.h:214
Definition: ncar_a2d_priv.h:165
dsm_sample_time_t timetag
Definition: ncar_a2d_priv.h:167
#define NUM_NCAR_A2D_CHANNELS
Definition: ncar_a2d.h:55
unsigned long base_addr16
Definition: ncar_a2d_priv.h:179
int scanRate
Definition: ncar_a2d_priv.h:193
wait_queue_head_t ppsWaitQ
Definition: ncar_a2d_priv.h:222
int nfilters
Definition: ncar_a2d_priv.h:225
unsigned int fifoNotEmpty
Definition: ncar_a2d_priv.h:236
struct dsm_sample_circ_buf a2d_samples
Definition: ncar_a2d_priv.h:217
int gain[NUM_NCAR_A2D_CHANNELS]
Definition: ncar_a2d_priv.h:189
int havePPS
Definition: ncar_a2d_priv.h:223
struct mutex mutex
Definition: ncar_a2d_priv.h:261
int nFifoValues
Definition: ncar_a2d_priv.h:198
int master
Definition: ncar_a2d_priv.h:203
wait_queue_head_t rwaitq_a2d
Definition: ncar_a2d_priv.h:218
unsigned long base_addr
Definition: ncar_a2d_priv.h:177
int offset[NUM_NCAR_A2D_CHANNELS]
Definition: ncar_a2d_priv.h:190
int errorState
Definition: ncar_a2d_priv.h:242
struct dsm_sample_circ_buf fifo_samples
Definition: ncar_a2d_priv.h:216
unsigned short OffCal
Definition: ncar_a2d_priv.h:246
int delaysBeforeFirstPoll
To be sure reads are not done from an empty FIFO, delay the reads until it is a least 1/4 full...
Definition: ncar_a2d_priv.h:210
int irigRate
Definition: ncar_a2d_priv.h:197
short data[NUM_NCAR_A2D_CHANNELS]
Definition: ncar_a2d_priv.h:170
unsigned int dsm_sample_length_t
length of data portion of sample.
Definition: types.h:51
int busy
Definition: ncar_a2d_priv.h:200
int pollDeltatMsec
Definition: ncar_a2d_priv.h:195
int tempRate
Definition: ncar_a2d_priv.h:232
unsigned int readCtr
Definition: ncar_a2d_priv.h:202
int interrupted
Definition: ncar_a2d_priv.h:201
unsigned int ioport
Definition: ncar_a2d_priv.h:175
unsigned int nbadFifoLevel
Definition: ncar_a2d_priv.h:235
#define CONFBLLEN
Definition: ncar_a2d.h:61
unsigned long cmd_addr
Definition: ncar_a2d_priv.h:181
unsigned short ser_num
Definition: ncar_a2d_priv.h:187
struct short_filter_info * filters
Definition: ncar_a2d_priv.h:226