#include <nidas/linux/ncar_a2d.h>
#include <nidas/linux/filters/short_filters_kernel.h>
#include <linux/wait.h>
#include <linux/device.h>

Classes
struct	a2d_sample

struct	A2DBoard

Macros
#define	A2D_MAX_RATE 5000

#define	A2DINSTBSY 0x8000

#define	A2DDATARDY 0x4000

#define	A2DDATAREQ 0x2000

#define	A2DIDERR 0x1000

#define	A2DCRCERR 0x0800

#define	A2DDATAERR 0x0400

#define	A2DINSTREG15 0x0200

#define	A2DINSTREG13 0x0100

#define	A2DINSTREG12 0x0080

#define	A2DINSTREG11 0x0040

#define	A2DINSTREG06 0x0020

#define	A2DINSTREG05 0x0010

#define	A2DINSTREG04 0x0008

#define	A2DINSTREG01 0x0004

#define	A2DINSTREG00 0x0002

#define	A2DCONFIGEND 0x0001

#define	A2DSTAT_INSTR_MASK 0x3fe

#define	MAX_A2D_BOARDS 4

#define	HWFIFODEPTH 1024

#define	POLL_WHEN_QUARTER_FULL
	Define this if you want a fixed polling rate of the A2D FIFO. More...

#define	A2DMASTER 0

#define	A2DIOWIDTH 0x10

#define	A2DCMDADDR 0xF

#define	A2DIO_FIFO 0x0

#define	A2DIO_CS_CMD 0x1

#define	A2DIO_I2C 0x2

#define	A2DIO_DATA 0x3

#define	A2DIO_D2A1 0x4

#define	A2DIO_CALV 0x5

#define	A2DIO_SYSCTL 0x6

#define	A2DIO_FIFOSTAT 0x7

#define	A2DIO_CS_WR 0x0

#define	A2DIO_CS_RD 0x8

#define	A2DIO_CS_CMD_RD (A2DIO_CS_CMD + A2DIO_CS_RD)

#define	A2DIO_CS_CMD_WR (A2DIO_CS_CMD + A2DIO_CS_WR)

#define	AD7725_READID 0x8802

#define	AD7725_READDATA 0x8d21

#define	AD7725_WRCONFIG 0x1800

#define	AD7725_WRCONFEM 0x1A00

#define	AD7725_ABORT 0x0000

#define	AD7725_BFIR 0x2000

#define	FIFOCLR 0x01

#define	A2DAUTO 0x02

#define	A2DSYNC 0x04

#define	A2DSYNCCK 0x08

#define	A2D1PPSEBL 0x10

#define	FIFODAFAE 0x20

#define	A2DSTATEBL 0x40

#define	FIFOWREBL 0x80

#define	FIFOHF 0x01

#define	FIFOAFAE 0x02

#define	FIFONOTEMPTY 0x04

#define	FIFONOTFULL 0x08

#define	INV1PPS 0x10

#define	PRESYNC 0x20

#define	USE_RESET_WORKER

Macro Definition Documentation

#define A2D1PPSEBL 0x10

Referenced by A2DEnable1PPS().

#define A2D_MAX_RATE 5000

#define A2DAUTO 0x02

Referenced by A2DAuto(), and A2DNotAuto().

#define A2DCMDADDR 0xF

Referenced by ncar_a2d_init().

#define A2DCONFIGEND 0x0001

Referenced by A2DConfig().

#define A2DCRCERR 0x0800

Referenced by A2DConfig().

#define A2DDATAERR 0x0400

#define A2DDATARDY 0x4000

#define A2DDATAREQ 0x2000

Referenced by A2DConfig().

#define A2DIDERR 0x1000

Referenced by A2DConfig().

#define A2DINSTBSY 0x8000

#define A2DINSTREG00 0x0002

Referenced by AD7725StatusInstrBits().

#define A2DINSTREG01 0x0004

Referenced by AD7725StatusInstrBits().

#define A2DINSTREG04 0x0008

Referenced by AD7725StatusInstrBits().

#define A2DINSTREG05 0x0010

Referenced by AD7725StatusInstrBits().

#define A2DINSTREG06 0x0020

Referenced by AD7725StatusInstrBits().

#define A2DINSTREG11 0x0040

Referenced by AD7725StatusInstrBits().

#define A2DINSTREG12 0x0080

Referenced by AD7725StatusInstrBits().

#define A2DINSTREG13 0x0100

Referenced by AD7725StatusInstrBits().

#define A2DINSTREG15 0x0200

Referenced by AD7725StatusInstrBits().

#define A2DIO_CALV 0x5

Referenced by SetVcal(), and UnSetVcal().

#define A2DIO_CS_CMD 0x1

#define A2DIO_CS_CMD_RD (A2DIO_CS_CMD + A2DIO_CS_RD)

Referenced by A2DConfig(), A2DStart(), A2DStopRead(), AD7725Status(), and ncar_a2d_init().

#define A2DIO_CS_CMD_WR (A2DIO_CS_CMD + A2DIO_CS_WR)

Referenced by A2DConfig(), A2DStart(), A2DStopRead(), ncar_a2d_init(), and test_ISA_Writes().

#define A2DIO_CS_RD 0x8

#define A2DIO_CS_WR 0x0

#define A2DIO_D2A1 0x4

Referenced by A2DSetGainAndOffset().

#define A2DIO_DATA 0x3

Referenced by A2DConfig(), and A2DSetGain().

#define A2DIO_FIFO 0x0

Referenced by A2DAuto(), A2DClearFIFO(), A2DClearSYNC(), A2DEnable1PPS(), A2DNotAuto(), A2DSetSYNC(), A2DTemp(), and readA2DFifo().

#define A2DIO_FIFOSTAT 0x7

Referenced by A2DBoardStatus(), and A2DSetMaster().

#define A2DIO_I2C 0x2

Referenced by A2DTemp().

#define A2DIO_SYSCTL 0x6

Referenced by SetCal(), SetOffset(), and wait7725Int().

#define A2DIOWIDTH 0x10

Referenced by ncar_a2d_cleanup(), and ncar_a2d_init().

#define A2DMASTER 0

#define A2DSTAT_INSTR_MASK 0x3fe

Referenced by A2DConfig(), A2DStart(), and ncar_a2d_init().

#define A2DSTATEBL 0x40

#define A2DSYNC 0x04

Referenced by A2DClearSYNC(), and A2DSetSYNC().

#define A2DSYNCCK 0x08

Referenced by A2DClearSYNC(), and A2DSetSYNC().

#define AD7725_ABORT 0x0000

Referenced by A2DStopRead(), and ncar_a2d_init().

#define AD7725_BFIR 0x2000

#define AD7725_READDATA 0x8d21

Referenced by A2DStart().

#define AD7725_READID 0x8802

#define AD7725_WRCONFEM 0x1A00

#define AD7725_WRCONFIG 0x1800

Referenced by A2DConfig().

#define FIFOAFAE 0x02

#define FIFOCLR 0x01

Referenced by A2DClearFIFO().

#define FIFODAFAE 0x20

#define FIFOHF 0x01

#define FIFONOTEMPTY 0x04

Referenced by getA2DFIFOLevel().

#define FIFONOTFULL 0x08

Referenced by getA2DFIFOLevel().

#define FIFOWREBL 0x80

#define HWFIFODEPTH 1024

Referenced by startBoard().

#define INV1PPS 0x10

Referenced by ppsCallback1().

#define MAX_A2D_BOARDS 4

Referenced by ncar_a2d_init().

#define POLL_WHEN_QUARTER_FULL

Define this if you want a fixed polling rate of the A2D FIFO.

If FIXED_POLL_RATE is not defined, a minimum rate will be chosen so that the maximum is read on each poll, but less than 1/4 the FIFO size.

gmaclean, 8 Feb 2012: 50 Hz polling (reading 80 words each time) may result in less chance of a buffer overflow on Vulcans than the computed polling rate of 20 Hz (200 words). Needs testing... Set POLL_WHEN_QUARTER_FULL if you want polling to be delayed by one or more periods so that the FIFO is at least 1/4 full before a poll. Then a poll is guaranteed not to empty the FIFO. If overflows of the FIFO are more of an issue, don't define this, and the polling will be delayed by just one period.

#define PRESYNC 0x20

#define USE_RESET_WORKER

Classes

Macros

Macro Definition Documentation