nidas v1.2.3
mesa.h
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1/* -*- mode: C; indent-tabs-mode: nil; c-basic-offset: 8; tab-width: 8; -*- */
2/* vim: set shiftwidth=8 softtabstop=8 expandtab: */
3/*
4 ********************************************************************
5 ** NIDAS: NCAR In-situ Data Acquistion Software
6 **
7 ** 2007, Copyright University Corporation for Atmospheric Research
8 **
9 ** This program is free software; you can redistribute it and/or modify
10 ** it under the terms of the GNU General Public License as published by
11 ** the Free Software Foundation; either version 2 of the License, or
12 ** (at your option) any later version.
13 **
14 ** This program is distributed in the hope that it will be useful,
15 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
16 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 ** GNU General Public License for more details.
18 **
19 ** The LICENSE.txt file accompanying this software contains
20 ** a copy of the GNU General Public License. If it is not found,
21 ** write to the Free Software Foundation, Inc.,
22 ** 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
23 **
24 ********************************************************************
25*/
26/* mesa.h
27
28 Header for the Mesa Electronics 4I34 driver.
29
30 Original Author: Mike Spowart
31
32*/
33
34#ifndef _mesa_driver_h_
35#define _mesa_driver_h_
36
37/* This header is also included from user-side code that
38 * wants to get the values of the ioctl commands, and
39 * the definition of the structures.
40 */
41
42#include "types.h"
43#include "util.h"
44#include "irigclock.h"
45
46// Sample ID's
47#define ID_COUNTERS 1
48#define ID_DIG_IN 2
49#define ID_DIG_OUT 3
50#define ID_260X 4
51#define ID_RADAR 5
52
53#define MESA_MAX_FPGA_BUFFER 512
54
55#define TWO_SIXTY_BINS 64
56
57// number of counters, radar altimeters and PMS260X
58#define N_COUNTERS 2
59#define N_RADARS 1
60#define N_PMS260X 1
61
62// Structures that are passed via ioctls to/from this driver
64{
66 int rate;
67};
69{
71 int rate;
72};
74{
76 int rate;
77};
78
80{
82 int value;
83};
84
86{
87 int len;
89};
90
92{
93 unsigned int missedSamples;
94};
95
96/* Pick a character as the magic number of your driver.
97 * It isn't strictly necessary that it be distinct between
98 * all modules on the system, but is a good idea. With
99 * distinct magic numbers one can catch a user sending
100 * a ioctl to the wrong device.
101 */
102#define MESA_MAGIC 'M'
103
104/*
105 * The enumeration of IOCTLs that this driver supports.
106 * See pages 130-132 of Linux Device Driver's Manual
107 */
108#define MESA_LOAD_START _IO(MESA_MAGIC, 0)
109#define MESA_LOAD_BLOCK _IOW(MESA_MAGIC, 1, struct mesa_prog)
110#define MESA_LOAD_DONE _IO(MESA_MAGIC, 2)
111#define COUNTERS_SET _IOW(MESA_MAGIC, 3, struct counters_set)
112#define RADAR_SET _IOW(MESA_MAGIC, 4, struct radar_set)
113#define PMS260X_SET _IOW(MESA_MAGIC, 5, struct pms260x_set)
114#define DIGITAL_IN_SET _IOW(MESA_MAGIC, 6, struct digital_in)
115#define MESA_STOP _IO(MESA_MAGIC, 7)
116#define MESA_IOC_MAXNR 7
117
118#ifdef __KERNEL__
119
120#include <linux/types.h>
121#include <linux/wait.h>
122#include <linux/device.h>
123
124#define MESA_4I34_MAX_NR_DEVS 4 // maximum number of Mesa 4I34 cards in sys
125#define MESA_REGION_SIZE 16 // # of reserved ioport addresses
126
127// registers on the Mesa 4I34 starting at the ioport address
128#define R_4I34DATA 0 // 4I34 data register.
129#define R_4I34CONTROL 1 // 4I34 control register.
130#define R_4I34STATUS 1 // 4I34 status register.
131
132/* Masks for R_4I34CONTROL.
133*/
134#define B_4I34CFGCS 0 /* Chip select. Enables read/write access to the FPGA via R_4I34DATA. */
135#define M_4I34CFGCSON (0x0 << B_4I34CFGCS) /* Enable access. */
136#define M_4I34CFGCSOFF (0x1 << B_4I34CFGCS) /* Disable access. */
137
138#define B_4I34CFGINIT 1 /* Control programming. */
139#define M_4I34CFGINITASSERT (0x0 << B_4I34CFGINIT) /* Wipe current configuration, prepare for programming. */
140#define M_4I34CFGINITDEASSERT (0x1 << B_4I34CFGINIT) /* Wait for programming data. */
141
142#define B_4I34CFGWRITE 2 /* Data direction control for R_4I34DATA. */
143#define M_4I34CFGWRITEENABLE (0x0 << B_4I34CFGWRITE) /* CPU --> R_4I34DATA. */
144#define M_4I34CFGWRITEDISABLE (0x1 << B_4I34CFGWRITE) /* R_4I34DATA --> CPU. */
145
146#define B_4I34LED 3 /* Red LED control. */
147#define M_4I34LEDON (0x1 << B_4I34LED)
148#define M_4I34LEDOFF (0x0 << B_4I34LED)
149
150/* Masks for R_4I34STATUS. */
151#define B_4I34PROGDUN 0 /* Programming-done flag. Set when the FPGA "program" has been successfully uploaded to the 4I34. */
152#define M_4I34PROGDUN (0x1 << B_4I34PROGDUN)
153#define PROGWAITLOOPCOUNT 20000
154
155
156#define STROBES_OFFSET 0x02 // "0010" (base address) = Read 260X total strobes
157#define HISTOGRAM_CLEAR_OFFSET 0x03 // "0011" clear histogram and clear histogram bin index pointer
158#define HISTOGRAM_READ_OFFSET 0x04 // "0100" read 260X histogram at bin pointed to by index
159#define HOUSE_ADVANCE_OFFSET 0x05 // "0101" 260X housekeeping advance
160#define HOUSE_READ_OFFSET 0x06 // "0110" 260X housekeeping data
161#define HOUSE_RESET_OFFSET 0x07 // "0111" 260X housekeeping reset
162#define COUNT0_READ_OFFSET 0x08 // "1000" Pulse counter #0
163#define COUNT1_READ_OFFSET 0x0A // "1010" Pulse counter #1
164#define RADAR_READ_OFFSET 0x0C // "1100" Altitude data
165#define TWOSIXTY_RESETS_OFFSET 0x0E // "1110" 260X Reset line.
166
167struct radar_state
168{
169 dsm_sample_time_t timetag;
170 unsigned short prevData;
171 int ngood;
172 int npoll;
173 int NPOLL;
174};
175
176struct MESA_Board
177{
178 unsigned int ioport; // ioport address of board
179
180 unsigned long addr; // ioport plus system ISA base
181
182 struct device* device;
183
184 char devName[64];
185 long latencyJiffies; // buffer latency in jiffies
186 unsigned long lastWakeup; // when were read & poll methods last woken
187
188 wait_queue_head_t rwaitq; // wait queue for user reads
189
190 struct irig_callback *cntrCallback;
191 struct irig_callback *radarCallback;
192 struct irig_callback *p260xCallback;
193
194 struct dsm_sample_circ_buf cntr_samples;
195 struct dsm_sample_circ_buf radar_samples;
196 struct dsm_sample_circ_buf p260x_samples;
197
198 struct sample_read_state cntr_read_state;
199 struct sample_read_state radar_read_state;
200 struct sample_read_state p260x_read_state;
201
202 int nCounters;
203 int nRadars;
204 int n260X;
205 unsigned int progNbytes;
206
207 struct radar_state rstate;
208
209 struct mesa_status status;
210
211 // available for open. Used to enforce exclusive access
212 atomic_t available;
213};
214
215#endif /* __KERNEL__ */
216
217#endif
static unsigned int ioport[MESA_4I34_MAX_NR_DEVS]
Definition mesa.c:72
#define MESA_MAX_FPGA_BUFFER
Definition mesa.h:53
static string device
Definition sing.cc:60
Definition mesa.h:64
int nChannels
Definition mesa.h:65
int rate
Definition mesa.h:66
Definition mesa.h:80
int nChannels
Definition mesa.h:81
int value
Definition mesa.h:82
Definition mesa.h:86
char buffer[MESA_MAX_FPGA_BUFFER]
Definition mesa.h:88
int len
Definition mesa.h:87
Definition mesa.h:92
unsigned int missedSamples
Definition mesa.h:93
Definition mesa.h:74
int nChannels
Definition mesa.h:75
int rate
Definition mesa.h:76
Definition mesa.h:69
int nChannels
Definition mesa.h:70
int rate
Definition mesa.h:71
int dsm_sample_time_t
Depending on the module, either tenths of milliseconds, or milliseconds since 00:00 UTC today.
Definition types.h:48