34 #ifndef _mesa_driver_h_
35 #define _mesa_driver_h_
53 #define MESA_MAX_FPGA_BUFFER 512
55 #define TWO_SIXTY_BINS 64
102 #define MESA_MAGIC 'M'
108 #define MESA_LOAD_START _IO(MESA_MAGIC, 0)
109 #define MESA_LOAD_BLOCK _IOW(MESA_MAGIC, 1, struct mesa_prog)
110 #define MESA_LOAD_DONE _IO(MESA_MAGIC, 2)
111 #define COUNTERS_SET _IOW(MESA_MAGIC, 3, struct counters_set)
112 #define RADAR_SET _IOW(MESA_MAGIC, 4, struct radar_set)
113 #define PMS260X_SET _IOW(MESA_MAGIC, 5, struct pms260x_set)
114 #define DIGITAL_IN_SET _IOW(MESA_MAGIC, 6, struct digital_in)
115 #define MESA_STOP _IO(MESA_MAGIC, 7)
116 #define MESA_IOC_MAXNR 7
121 #include <linux/wait.h>
122 #include <linux/device.h>
124 #define MESA_4I34_MAX_NR_DEVS 4 // maximum number of Mesa 4I34 cards in sys
125 #define MESA_REGION_SIZE 16 // # of reserved ioport addresses
128 #define R_4I34DATA 0 // 4I34 data register.
129 #define R_4I34CONTROL 1 // 4I34 control register.
130 #define R_4I34STATUS 1 // 4I34 status register.
134 #define B_4I34CFGCS 0
135 #define M_4I34CFGCSON (0x0 << B_4I34CFGCS)
136 #define M_4I34CFGCSOFF (0x1 << B_4I34CFGCS)
138 #define B_4I34CFGINIT 1
139 #define M_4I34CFGINITASSERT (0x0 << B_4I34CFGINIT)
140 #define M_4I34CFGINITDEASSERT (0x1 << B_4I34CFGINIT)
142 #define B_4I34CFGWRITE 2
143 #define M_4I34CFGWRITEENABLE (0x0 << B_4I34CFGWRITE)
144 #define M_4I34CFGWRITEDISABLE (0x1 << B_4I34CFGWRITE)
147 #define M_4I34LEDON (0x1 << B_4I34LED)
148 #define M_4I34LEDOFF (0x0 << B_4I34LED)
151 #define B_4I34PROGDUN 0
152 #define M_4I34PROGDUN (0x1 << B_4I34PROGDUN)
153 #define PROGWAITLOOPCOUNT 20000
156 #define STROBES_OFFSET 0x02 // "0010" (base address) = Read 260X total strobes
157 #define HISTOGRAM_CLEAR_OFFSET 0x03 // "0011" clear histogram and clear histogram bin index pointer
158 #define HISTOGRAM_READ_OFFSET 0x04 // "0100" read 260X histogram at bin pointed to by index
159 #define HOUSE_ADVANCE_OFFSET 0x05 // "0101" 260X housekeeping advance
160 #define HOUSE_READ_OFFSET 0x06 // "0110" 260X housekeeping data
161 #define HOUSE_RESET_OFFSET 0x07 // "0111" 260X housekeeping reset
162 #define COUNT0_READ_OFFSET 0x08 // "1000" Pulse counter #0
163 #define COUNT1_READ_OFFSET 0x0A // "1010" Pulse counter #1
164 #define RADAR_READ_OFFSET 0x0C // "1100" Altitude data
165 #define TWOSIXTY_RESETS_OFFSET 0x0E // "1110" 260X Reset line.
170 unsigned short prevData;
186 unsigned long lastWakeup;
188 wait_queue_head_t rwaitq;
190 struct irig_callback *cntrCallback;
191 struct irig_callback *radarCallback;
192 struct irig_callback *p260xCallback;
194 struct dsm_sample_circ_buf cntr_samples;
195 struct dsm_sample_circ_buf radar_samples;
196 struct dsm_sample_circ_buf p260x_samples;
198 struct sample_read_state cntr_read_state;
199 struct sample_read_state radar_read_state;
200 struct sample_read_state p260x_read_state;
205 unsigned int progNbytes;
207 struct radar_state rstate;
static string device
Definition: sing.cc:60
int rate
Definition: mesa.h:66
int rate
Definition: mesa.h:71
int nChannels
Definition: mesa.h:75
int dsm_sample_time_t
Depending on the module, either tenths of milliseconds, or milliseconds since 00:00 UTC today...
Definition: types.h:48
char buffer[MESA_MAX_FPGA_BUFFER]
Definition: mesa.h:88
int rate
Definition: mesa.h:76
unsigned int missedSamples
Definition: mesa.h:93
int nChannels
Definition: mesa.h:65
static unsigned int ioport[MESA_4I34_MAX_NR_DEVS]
Definition: mesa.c:72
int value
Definition: mesa.h:82
int len
Definition: mesa.h:87
int nChannels
Definition: mesa.h:70
#define MESA_MAX_FPGA_BUFFER
Definition: mesa.h:53
int nChannels
Definition: mesa.h:81